MEMORY DEVICE WITH MEMORY PILLAR INSIDE CONDUCTOR
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United States of America
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Issued Date -
Feb 13, 2025
app pub date -
Oct 21, 2024
filing date -
Oct 21, 2024
priority date (Note) -
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Abstract
A first conductor extends along first and second axes. A first memory pillar is provided in the first conductor and includes a first semiconductor and a charge accumulation layer. A second conductor extends along the second axis and is in contact with the first memory pillar. A third conductor extends along the first and second axes and is arranged with a distance from the first conductor along the second axis. A second memory pillar is provided in the third conductor and includes a second semiconductor and a charge accumulation layer. The fourth conductor extends along the second axis and is in contact with the second memory pillar. The fifth conductor extends along the second axis and is coupled to the first and second memory pillars.
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