PULSE GENERATOR AND MEMORY DEVICE COMPRISING THE SAME
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United States of America
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Feb 6, 2025
app pub date -
Jan 23, 2024
filing date -
Jan 23, 2024
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Abstract
A memory device includes a cell array including a plurality of static random-access memory (SRAM) cells; a row decoder configured to drive a plurality of word lines of the plurality of SRAM cells based on a row address; a data input/output circuit connected to a plurality of bit lines of the cell array and connected to a sub-power line configured to supply cell voltage to the plurality of SRAM cells; and a word line pulse generator configured to generate a word line pulse with a first pulse width that varies based on the row address and to provide the word line pulse to the row decoder.
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