MEMORY DEVICE FOR OUTPUTTING DATA AND METHOD OF OPERATING THE SAME
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United States of America
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Issued Date -
Feb 6, 2025
app pub date -
Dec 20, 2023
filing date -
Dec 20, 2023
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Abstract
A memory device for outputting data, and a method of operating the same, includes a cache latch group including a plurality of cache latches that are sequentially arranged, wherein a plurality of odd cache latches and a plurality of even cache latches that are included in the plurality of cache latches are alternately arranged. The memory device also includes a sense amplifier configured to be coupled to the plurality of odd cache latches through a first bit output line group and alternately coupled to the plurality of even cache latches through a second bit output line group. The memory device additionally includes a bit output line selection circuit configured to alternately couple the sense amplifier to the first bit output line group and the second bit output line group in response to a bit output line selection signal.
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