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Abstract

Systems, methods, and apparatuses are provided for an asymmetric vertical thin film transistor selector. An apparatus includes first and second source/drain regions formed on a substrate, a channel separating the first source/drain region and the second source/drain region, and a gate separated from the channel by a gate dielectric material. The first source/drain region, the second source/drain region, the channel, and the gate form a vertical thin film transistor, a first end of the channel is coupled to the first source/drain region and extends beyond a first end of the gate, and a second end of the channel is coupled to the second source/drain region and does not extend beyond a second end of the gate that is opposite the first end of the gate. A contact in the substrate is coupled to the first source/drain region and a sense line is coupled to the second source/drain region.

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