LAYOUT PATTERN FOR MAGNETORESISTIVE RANDOM ACCESS MEMORY

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250040149A1
SERIAL NO

18916730

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Abstract

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A layout pattern for magnetoresistive random access memory (MRAM) includes a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region, a first gate pattern extending along a first direction from the first active region to the second active region, a second gate pattern extending along the first direction from the first active region to the second active region, a first magnetic tunneling junction (MTJ) between the first gate pattern and the second pattern and within the word line connecting region, and a second MTJ between the first gate pattern and the second gate pattern in the first active region. Preferably, top surfaces of the first MTJ and the second MTJ are coplanar.

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Patent Owner(s)

  • UNITED MICROELECTRONICS CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Hung-Yueh Hsinchu City, TW 74 251
Huang, Rai-Min Taipei City, TW 51 301
Tsai, Ya-Huei Tainan City, TW 26 60
Wang, Yu-Ping Hsinchu City, TW 130 611

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