MEMORY DEVICES CONFIGURED WITH ADAPTIVE WORD LINE PULSE ADJUSTMENT AND METHODS FOR OPERATING THE SAME
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United States of America
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Issued Date -
Jan 30, 2025
app pub date -
Oct 2, 2023
filing date -
Oct 2, 2023
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Abstract
A memory device includes a memory array comprising a plurality of word lines, the plurality of word lines operatively coupled to a plurality of sets of memory cells, respectively. The memory device includes a controller operatively coupled to the memory array, and comprising an adaptive tracking circuit. The adaptive tracking circuit is configured to: receive a first signal conducted through a first tracking line; receive an address signal indicating one of the word lines to be asserted; and adjust, based on the address signal, a timing of a transition edge of a second signal conducted through a second tracking line.
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