AUTOMATIC CALIBRATION OF A RING PHASE LOCKED LOOP
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United States of America Patent
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Issued Date -
Jan 23, 2025
app pub date -
Jul 18, 2023
filing date -
Jul 18, 2023
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Abstract
A system for automatically calibrating a phase locked loop (PLL), the system comprising: a node a voltage controlled oscillator (VCO) coupled to the node and configured to provide an output signal to the node; at least one digital-to-analog converter (DAC) coupled to the VCO and configured to provide a voltage to the VCO; and at least one controller configured to: determine an output frequency of the output signal; responsive to determining the output frequency, compare the output frequency to the voltage; responsive to determining the output frequency, compare the output frequency to a target frequency; and control the DAC to modify the voltage based on a comparison of the output frequency to the voltage and a comparison of the output frequency to the target frequency.
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