ENHANCED INTERCONNECTION BALL GRID ARRAY DESIGN, SEMICONDUCTOR STRUCTURE, AND FABRICATING METHOD THEREOF
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United States of America Patent
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Issued Date -
Jan 23, 2025
app pub date -
Aug 15, 2023
filing date -
Aug 15, 2023
priority date (Note) -
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Abstract
A semiconductor structure, a fabricating method thereof, and a chip packing structure are provided. The disclosed semiconductor structure includes a printed circuit board, a chip packing structure, and a ball grid array connected between the printed circuit board and the chip packing structure. The ball grid array includes first solder balls each having a first lateral size, and second solder balls each having a second lateral size greater than the first lateral size. The second solder balls are located at corners of the ball grid array, respectively.
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