Importance

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Abstract

The present disclosure relates to three-dimensional semiconductor devices. An example three-dimensional semiconductor device includes a back-side metal layer, a lower active region on the back-side metal layer, the lower active region including a lower channel pattern and a lower source drain pattern connected with the lower channel pattern, an upper active region on the lower active region, the upper active region including an upper channel pattern and an upper source drain pattern connected with the upper channel pattern, an interlayer insulating layer enclosing the lower and upper source drain patterns, a penetration conductive pattern extending through the interlayer insulating layer in a vertical direction, and an inhibitor covering a side surface of a lower portion of the penetration conductive pattern. The inhibitor includes a carbon atom.

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First Claim