Driver Circuit
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
N/A
Issued Date -
Jan 9, 2025
app pub date -
Dec 16, 2021
filing date -
Dec 16, 2021
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A single ended driver circuit (100) for a digital to analog conversion, DAC, cell is presented. The driver circuit (100) comprises one positive single-edge latch (200) configured to provide a positive edge latched data signal (S+) by latching a positive edge of a data signal (D) synchronized by a first clock signal (CLK1), and a negative single-edge latch (300) configured to provide a negative edge latched data signal (S−) by latching a negative edge of the data signal (D) synchronized by a second clock signal (CLK2). The positive edge latched data signal (S+) and the negative edge latched data signal (S−) are combined to provide a drive signal (S) having a positive edge synchronized by the first clock signal (CLK1) and a negative edge synchronized by the second clock signal (CLK2). The positive single-edge latch (200) and the negative single-edge latch (300) are also presented.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully