DUAL LOOP CHARGE PUMP FOR ENHANCED RELIABILITY AND POWER CONSUMPTION
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United States of America
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Issued Date -
Dec 26, 2024
app pub date -
Jun 21, 2023
filing date -
Jun 21, 2023
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Abstract
Embodiments of the present disclosure provide an enhanced phase-locked loop (PLL) circuit and an enhanced charge pump circuit used for various applications, including high-speed data clock generation for complex integrated circuit (IC) designs. The disclosed PLL circuit and charge pump circuit enable significant power and supply current reduction, improved circuit reliability; reduced self-heating and electro-migration risk, and enable use of lower power operational amplifiers with the operational amplifiers driving high impedance nodes.
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