MEMORY CIRCUIT COMPRISING ELECTRONIC CELLS AND A CONTROL CIRCUIT
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United States of America
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Issued Date -
Dec 19, 2024
app pub date -
Jun 10, 2024
filing date -
Jun 10, 2024
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Abstract
A memory circuit includes a memory array formed by electronic cells. Each electronic cell includes an integrated stack having, successively, a first electrode, an intermediate layer formed by an ovonic threshold switching layer, and a resistor connected to the intermediate layer. A control circuit is connected to the electronic cell. The control circuit is structured and configured to apply, between the first electrode and the resistor, a first voltage impulse of a first polarity to set a first logic state of the electronic cell and a second voltage impulse of a second polarity, opposite the first polarity, to set a second logic state of the electronic cell.
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