DEVICES INCLUDING THROUGH-SUBSTRATE VIAS (TSVs) FOR BACKSIDE INTERCONNECTION, AND RELATED FABRICATION METHODS
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United States of America
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Issued Date -
Dec 19, 2024
app pub date -
Jun 16, 2023
filing date -
Jun 16, 2023
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Abstract
A package includes a device that includes electrodes disposed on a piezoelectric layer on a first, front side of a first substrate and vertical interconnect accesses (vias) that extend through the substrate to couple the electrodes to a second, back side of the first substrate. The vias may be through-substrate vias (TSVs). Employing a first substrate (e.g., silicon) in which vias can be formed, the electrodes on the front side can be coupled to interconnects on the back side to minimize electrical path distances to and from the device for a higher a Q factor. Also, a capacitor may be formed on a second, back side of the substrate and coupled to an electrode of the device by a via rather than having an electrical path from a first substrate, to an external capacitor on a package substrate. A thermal conductive path is also reduced for improved heat dissipation.
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