ENHANCED I/O SEMICONDUCTOR CHIP PACKAGE AND COOLING ASSEMBLY HAVING SIDE I/OS
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United States of America
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Issued Date -
Dec 19, 2024
app pub date -
Dec 16, 2021
filing date -
Dec 16, 2021
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Abstract
A semiconductor chip package is described. The semiconductor chip package has a substrate. The substrate has side I/Os on the additional surface area of the substrate. The side I/Os are coupled to I/Os of a semiconductor chip within the semiconductor chip package. A cooling assembly has also been described. The cooling assembly has a passageway to guide a cable to connect to a semiconductor chip's side I/Os that are located between a base of a cooling mass and an electronic circuit board that is between a bolster plate and a back plate and that is coupled to second I/Os of the semiconductor chip through a socket that the semiconductor chip's package is plugged into.
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