MEMORY CONTROLLER AND MEMORY SYSTEM
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United States of America
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Issued Date -
Dec 19, 2024
app pub date -
Jun 14, 2024
filing date -
Jun 14, 2024
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Abstract
A memory controller includes a memory interface circuit, a memory device, and an error correction circuit. The memory interface circuit receives, during a read operation executed in a semiconductor memory device, a data signal from the semiconductor memory device to acquire the data from the data signal. The error correction circuit is configured to store in the memory device likelihood information of the data acquired from the data signal, revise the likelihood information of the data acquired from the data signal, and perform an error correction process on the data based on the revised likelihood information.
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