Method of Forming a Semiconductor Module
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United States of America
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Issued Date -
Dec 12, 2024
app pub date -
Aug 20, 2024
filing date -
Aug 20, 2024
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Abstract
A method includes forming a laminate structure including an electrically insulating core layer having a first side and a second side, a first redistribution layer arranged on the first side and a second redistribution layer arranged on the second side, providing a first transistor device and a second transistor device, and providing a control chip, embedding the first transistor device, the second transistor device and the control chip in the core layer, forming a half-bridge circuit that comprises the first transistor device connects to the second transistor device, wherein first sides of the control chip, and one of the first and second transistor devices face towards the first redistribution layer, wherein the second transistor device comprises one or more conductive device that electrically couple gate electrodes at the first side of the second transistor device to a pad arranged on a second side of the second transistor device.
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