EMBEDDED MEMORY DEVICE, INTEGRATED CIRCUIT HAVING THE SAME AND METHOD OF OPERATING THE SAME

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United States of America

APP PUB NO 20240412771A1
SERIAL NO

18507444

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Abstract

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An embedded memory device includes a retention voltage supply circuit outputting a retention voltage in response to a retention activation signal, and a plurality of array voltage supply circuits outputting corresponding array voltages to corresponding bit cells. The plurality of array voltage supply circuits respectively include an array switch providing the retention voltage as a corresponding array voltage in response to the retention activation signal, a power switch providing a power supply voltage as the corresponding array voltage in response to a power gate activation signal, and an auxiliary circuit compensating the corresponding array voltage during a write operation or a read operation.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTD129 SAMSUNG-RO YEONGTONG-GU SUWON-SI GYEONGGI-DO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Choi, Jaesung Suwon-si, KR 20 69
Kang, Jeonseung Suwon-si, KR 1 0
Kang, Jungmyung Suwon-si, KR 2 0
Kim, Duhwi Suwon-si, KR 2 0
Kim, Jaeyoung Suwon-si, KR 214 1779
Kim, Kiryong Suwon-si, KR 3 1
Lee, Inhak Suwon-si, KR 16 34

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