Standby Voltage Condition for Fast RF Amplifier Bias Recovery

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20240405724A1
SERIAL NO

18656926

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Abstract

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Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.

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Patent Owner(s)

Patent OwnerAddress
PSEMI CORPORATION9369 CARROLL PARK DRIVE SAN DIEGO CA 92121

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Pal, Kashish Reading, GB 26 228
Wagh, Poojan Sleepy Hollow, US 20 423

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