SEMICONDUCTOR MEMORY SYSTEM

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20240405010A1
SERIAL NO

18805872

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Abstract

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According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

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Patent Owner(s)

Patent OwnerAddress
KIOXIA CORPORATION1-21 SHIBAURA 3-CHOME MINATO-KU TOKYO 108-0023

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
KIMURA, Naoki Kanagawa, JP 166 1047
MASUBUCHI, Hayato Kanagawa, JP 17 64
MATSUMOTO, Manabu Kanagawa, JP 158 1876
MORIMOTO, Toyota Kanagawa, JP 19 337

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