SEMICONDUCTOR MEMORY DEVICE
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United States of America
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Issued Date -
Dec 5, 2024
app pub date -
May 31, 2024
filing date -
May 31, 2024
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Abstract
A semiconductor memory device of an embodiment includes: a stacked body including conductive layers stacked apart from each other and having a step portion where the conductive layers are processed in a step-like shape; contacts arranged in the step portion at least on one line in a first direction intersecting with a stacking direction of the stacked body and respectively connected with the conductive layers. A plurality of columnar portions includes first columnar portions having a layer structure different from that of a pillar, and second columnar portions having a same layer structure as that of the pillar. The first columnar portions are arranged on an array at least partially overlapping an array position of the contacts in the first direction. The second columnar portions are arranged on an array away from the array position of the contacts in a second direction intersecting with the stacking direction and the first direction.
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