MOLDED POWER SEMICONDUCTOR PACKAGE
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United States of America
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Issued Date -
Dec 5, 2024
app pub date -
Jun 2, 2023
filing date -
Jun 2, 2023
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Abstract
A molded power semiconductor package includes a mold compound having first and second opposing main surfaces and an edge between the first and second main surfaces. Power semiconductor dies are embedded in the mold compound. A metallic frame embedded in the mold compound is electrically connected to the power semiconductor dies. Pins protrude from the first main surface of the mold compound, each pin being secured to a respective contact area of the metallic frame that is exposed by an opening in the mold compound at the first main surface. One or more of the openings extends to the edge of the mold compound to form an open channel from each contact area exposed by the one or more of the openings to the edge of the mold compound. Additional package embodiments and methods of production are also described.
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