SOLID-STATE BONDING METHOD FOR THE MANUFACTURE OF SEMICONDUCTOR CHUCKS AND HEATERS

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20240404869A1
SERIAL NO

18804194

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Abstract

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A layered assembly for use in a controlled atmosphere chamber includes a plurality of substrates and an electrically functioning layer embedded between two adjacent substrates of the plurality of substrates, the electrically functioning layer being a material configured to secure the two adjacent substrates together using a solid-state bonding process. An electrical termination area is integral with the electrically functioning layer, and a peripheral sealing band is embedded between and extends around a periphery of internal faces of the two adjacent substrates, the peripheral sealing band being a material configured to secure and seal the two adjacent substrates together using the solid-state bonding process. Dielectric regions are present between the two adjacent substrates and between edge boundaries of the electrically functioning layer, the dielectric regions being sealed between the two adjacent substrates by the peripheral sealing band.

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Patent Owner(s)

Patent OwnerAddress
WATLOW ELECTRIC MANUFACTURING COMPANY12001 LACKLAND ROAD ST LOUIS MO 63146

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
BHATNAGAR, Ashish Livermore, US 42 565
ELLIOT, Brent Cupertino, US 26 151
HUSSEN, Guleid San Francisco, US 20 89
PARKER, Michael Arnold, US 97 1332
PTASIENSKI, Kevin O'Fallon, US 61 544
REX, Dennis Williams, US 4 12
STEPHENS, Jason San Francisco, US 22 71

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