HETEROSTRUCTURE AND METHOD OF FABRICATION

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United States of America

APP PUB NO 20240396520A1
SERIAL NO

18790454

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention relates to a heterostructure, in particular, a piezoelectric structure, comprising a cover layer, in particular, a layer of piezoelectric material, the material of the cover layer having a first coefficient of thermal expansion, assembled to a support substrate, the support substrate having a second coefficient of thermal expansion substantially different from the first coefficient of thermal expansion, at an interface wherein the cover layer comprises at least a recess extending from the interface into the cover layer, and its method of fabrication.

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Patent Owner(s)

Patent OwnerAddress
SOITEC SILICON ON INSULATORFRENCH BOERNING

International Classification(s)

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  • 2024 Application Filing Year
  • H03H Class
  • 599 Applications Filed
  • 21 Patents Issued To-Date
  • 3.51 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances202420250255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aspar, Bernard Saint-Ismier, FR 90 4100
Castex, Arnaud Grenoble, FR 23 160
Delprat, Daniel Crolles, FR 30 227
Radu, Ionut Crolles, FR 60 1316

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Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges8934501 - 10050100150200250300350400450500550600650700750800850900950

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