Three-Dimensional Integrated Circuit with Hybrid Bond Metal Structure

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20240395750A1
SERIAL NO

18466153

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Abstract

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One aspect of the present disclosure pertains to an IC packaging structure that includes a bottom circuit structure having first semiconductor devices on a first substrate, a first interconnect structure over the first semiconductor devices, and a first bonding structure over the first interconnect structure; and a top circuit structure having second semiconductor devices on a second substrate, a second interconnect structure underlying the second semiconductor devices, and a second bonding structure underlying the second interconnect structure. The first bonding structure includes a first metal feature having a first crystalline bulk layer of a metal and a first amorphous surface layer of the metal. The second bonding structure includes a second metal feature having a second crystalline bulk layer of the metal and a second amorphous surface layer of the metal. The top circuit structure is bonded to the bottom circuit structure through the first and second amorphous surface layers.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDNO 8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CHANG, Jui Shen Taichung City, TW 4 0
CHIU, Chen-Nan Hsinchu City, TW 6 0
CHUANG, Yao-Chun Hsinchu City, TW 94 790
HE, Jun Hsinchu County, TW 231 1098
LAI, Yu-Chang Hsinchu City, TW 3 6

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