JITTER REDUCTION IN MIXED-SIGNAL PROCESSING CIRCUITS
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
N/A
Issued Date -
Nov 28, 2024
app pub date -
May 24, 2023
filing date -
May 24, 2023
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A signal processing circuit includes an analog front-end circuit and a digital delay circuit. The analog circuit receives a clock signal and provides a compensated clock signal. The digital delay circuit is coupled to the analog front-end circuit and provides a compensated sample clock signal in response to delaying the compensated clock signal. The analog circuit measures a variation of a power supply voltage and adjusts a gain through the analog circuit according to a measured variation of the power supply voltage.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully