PHASE LOCKED LOOP HAVING FAST LOCK FUNCTION
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United States of America
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Issued Date -
Nov 21, 2024
app pub date -
Jan 29, 2024
filing date -
Jan 29, 2024
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Abstract
A phase locked loop includes a main voltage-controlled oscillator for which an oscillation frequency is adjusted by an offset current and a control voltage (Vctrl), the offset current being set by an offset current setting code (VCO_CON), a phase frequency detector configured to adjust the control voltage by comparing an output signal (mCLK) of the main voltage-controlled oscillator and an input data signal (Data), and an offset current setter configured to generate the offset current setting code for setting the offset current of the main voltage-controlled oscillator. The offset current setter includes n sample voltage-controlled oscillators configured to generate n signals with different frequencies, respectively, and n counters configured to compare frequencies of each of the signals (sCLK) output from the n sample voltage-controlled oscillators and the input data signal, and is configured to generate the offset current setting code based on a comparison result of the n counters.
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