CLOCK OUTPUT DEVICE AND CLOCK DETECTION METHOD
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United States of America
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Issued Date -
Nov 21, 2024
app pub date -
May 9, 2024
filing date -
May 9, 2024
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Abstract
A clock output device includes a noise detector circuit and a clock buffer circuit. The noise detector circuit is configured to be enabled according to a request signal to determine whether a reference clock signal is a noise according to at least one of a common-mode level or a frequency of the reference clock signal and generate an enable signal. The clock buffer circuit is configured to be enabled according to the enable signal to generate an output clock signal according to the reference clock signal.
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