METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SYSTEM FOR SAME
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United States of America
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Nov 21, 2024
app pub date -
Jul 26, 2024
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Jul 26, 2024
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Abstract
A method (of manufacturing a semiconductor device, a corresponding layout diagram being stored on a non-transitory computer-readable medium, the layout diagram including layout cells) comprises generating the layout diagram including: reusing one amongst predefined parasitic capacitance (PC) descriptions of corresponding predefined cells that are stored within a database, the reusing including: for a candidate cell amongst the layout cells in the layout diagram, searching the database for one amongst the predefined cells (matching predefined cell) that is a substantial match to the candidate cell; and when a substantial match is found, reusing the PC description of the matching predefined cell by assigning the same to the candidate cell rather than otherwise making a discrete calculation of a corresponding PC description for the candidate cell.
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