TIMING ANALYSIS FOR NON-SCAN LATCHES

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20240386175A1
SERIAL NO

18319934

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

The present disclosure describes systems and methods for performing timing analysis of circuit designs. According to an embodiment, a method includes assigning a timing margin to a non-scan latch of a circuit design and performing a timing analysis on the circuit design using the timing margin for the non-scan latch to produce timing results for the circuit design. The timing results include a slack value. The method also includes calculating a credit based on the slack value and updating the slack value based on the credit.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
ALLEN, Robert John Jericho, US 10 214
BUCK, Nathan Underhill, US 18 75
DEDRICK, Daniel Stanford, US 1 0
FOREMAN, Eric Fairfax, US 13 8
GUPTA, Hemlata Hopewell Junction, US 21 58
KALAFALA, Kerim Rhinebeck, US 91 570
KO, Tsz-Mei Poughkeepsie, US 11 34
RAJASHEKARA, Karthik Bengaluru, IN 1 0
RAO, Rahul M Bangalore, IN 51 270
WOOD, Michael Hemsley Wilmington, US 20 34

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation