COMPUTATIONAL MEMORY
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United States of America
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Issued Date -
Nov 21, 2024
app pub date -
Jul 30, 2024
filing date -
Jul 30, 2024
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Abstract
An example device includes a plurality of computational memory banks. Each computational memory bank of the plurality of computational memory banks includes an array of memory units and a plurality of processing elements connected to the array of memory units. The device further includes a plurality of single instruction, multiple data (SIMD) controllers. Each SIMD controller of the plurality of SIMD controllers is contained within at least one computational memory bank of the plurality of computational memory banks. Each SIMD controller is to provide instructions to the at least one computational memory bank.
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