Bond Films for Reduced Thermal Resistance and Methods Forming the Same

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United States of America

APP PUB NO 20240379505A1
SERIAL NO

18314356

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Abstract

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A method includes forming feature for a first package component, and the forming the feature includes a planarization process to level a top surface of the feature. A silicon-containing dielectric layer is deposited over and contacting the feature, and as a surface feature of the first package component. A second package component is bonded to the silicon-containing dielectric layer through fusion bonding. The silicon-containing dielectric layer has a same thickness in both steps of the depositing and the fusion bonding.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cheng, Kuang-Wei Hsinchu, TW 48 126
Chung, Ming-Tsu Hsinchu, TW 31 60
Lin, Yung-Chi Su-Lin City, TW 99 1736

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