SELF-ALIGNED LINES AND METHODS FOR FABRICATING THE SAME

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20240379418A1
SERIAL NO

18781858

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A disclosed method of fabricating a semiconductor structure includes forming a first conductive pattern over a substrate, with the first conductive pattern including a first conductive line and a second conductive line. A barrier layer may be conformally formed over the first conductive line and the second conductive line of the first conductive pattern. An insulating layer may be formed over the barrier layer. The insulating layer may be patterned to form openings between conductive lines of the first conductive pattern a second conductive pattern may be formed in the openings. The second conductive pattern may include a third conductive line is physically separated from the first conductive pattern by the barrier layer. The presence of the barrier layer reduces the risk of a short circuit forming between the first and second conductive patterns. In this sense, the second conductive pattern may be self-aligned relative to the first conductive pattern.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU 300-78

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
HO, Yen-Chung Hsinchu, TW 34 23
HSU, Pin-Cheng Zhubei City, TW 45 43
LIN, Chung-Te Taiwan City, TW 395 1052
WEI, Hui-Hsien Taoyuan City, TW 46 133
WU, Yong-Jie Hsinchu, TW 27 15
YANG, Feng-Cheng Zhudong Township, TW 256 877
YU, Chia-Jung Hsinchu, TW 32 18

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