MEMORY DEVICE AND OPERATION METHOD THEREOF

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20240377988A1
SERIAL NO

18535027

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Abstract

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A memory device may include a memory cell array including first to fourth memory cells respectively connected to first to fourth word lines, a sense amplifier including a first sensing circuit that is configured to generate a first weighted sum based on a first weight stored in the first memory cell and a second weight stored in the third memory cell, in response to an activation of the first and third word lines at a first time point, an input and output circuit that is configured to output the first weighted sum to an external device in response to a first read command, and a restore circuit that is configured to perform a restore operation for storing a first data item stored in the second memory cell to the first memory cell and for storing a second data item stored in the fourth memory cell to the third memory cell after the first time point.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTD129 SAMSUNG-RO YEONGTONG-GU GYEONGGI-DO SUWON-SI 16677

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CHOI, JAE HYUN Suwon-si, KR 28 97
LEE, SOOYONG Suwon-si, KR 23 13

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