Semiconductor Structure Cutting Process and Structures Formed Thereby

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20240371869A1
SERIAL NO

18775025

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Abstract

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Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MFG CO LTDNO 8 LI-HSIN RD 6 SCIENCE-BASED INDUSTRIAL PARK HSIN-CHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Cheng-Chung Kaohsiung City, TW 66 568
Chang, Ming-Ching Hsinchu, TW 178 1039
Chen, Ryan Chia-Jen Hsinchu, TW 173 1719
Chen, Yi-Chun Hsinchu, TW 167 976
Hsu, Shao-Hua Taitung City, TW 40 278
Lin, Yu-Hsien Kaohsiung City, TW 79 446
Pan, Tzu-Wen Hsinchu, TW 14 40
Yin, Li-Wei Hsinchu, TW 22 66

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