THREE-DIMENSIONAL MEMORY DEVICE CONTAINING PERIPHERAL CIRCUIT WITH FIN AND PLANAR FIELD EFFECT TRANSISTORS AND METHOD OF MAKING THEREOF
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United States of America
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Issued Date -
Nov 7, 2024
app pub date -
Jul 28, 2023
filing date -
Jul 28, 2023
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Abstract
A semiconductor structure includes a logic die containing a word line switching circuit containing a fin field effect transistor having at least one semiconductor fin, and a planar field effect transistor, and a memory die containing a three-dimensional memory device bonded to the logic die.
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