FORMING A SACRIFICIAL LINER FOR DUAL CHANNEL DEVICES
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United States of America
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Issued Date -
Oct 31, 2024
app pub date -
Dec 6, 2023
filing date -
Dec 6, 2023
priority date (Note) -
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status (Latency Note)
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Abstract
A semiconductor device includes one or more fins. Each fin includes a top channel portion formed from a channel material, a middle portion, and a bottom substrate portion formed from a same material as an underlying substrate. An oxide layer is formed between the bottom substrate portion of each fin and the isolation layer, with a space between a sidewall of at least a top portion of the isolation dielectric layer and an adjacent sidewall of the one or more fins, above the oxide layer. A gate dielectric, protruding into the space and in contact with the middle portion, is formed over the one or more fins and has a portion formed from a material different from the oxide layer.
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