Input Hysteresis Buffer in Overdrive Design
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United States of America Patent
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Issued Date -
Oct 24, 2024
app pub date -
Apr 18, 2023
filing date -
Apr 18, 2023
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Abstract
Circuits and methods are provided for an input hysteresis buffer that includes a voltage limiting unit, a voltage detecting unit connected to the voltage limiting unit, and a supply tracking bias unit connected to the voltage detecting unit. The voltage liming unit comprises a first voltage limiting unit and a second voltage limiting unit. The voltage detecting unit comprises a first voltage detecting unit configured to detect the presence of a first threshold voltage in an input signal, and a second voltage detecting unit configured to detect the presence of a second threshold voltage in the input signal. The supply tracking bias unit is configured to supply a control signal to the voltage detecting unit.
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