HYBRID MOLYBDENUM FILL SCHEME FOR LOW RESISTIVITY SEMICONDUCTOR APPLICATIONS

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United States of America Patent

APP PUB NO 20240355673A1
SERIAL NO

18136970

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Abstract

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Semiconductor devices and methods for molybdenum fill in semiconductor devices are provided. In one aspect, a method for processing a semiconductor device substrate is provided. The method includes exposing at least one feature formed in a dielectric layer to a grain modification layer deposition process to deposit a grain modification layer over at least a portion of the at least one feature. The at least one feature is defined by sidewall surfaces formed in the dielectric layer and a bottom surface extending between the sidewall surfaces. The method further includes exposing the at least one feature to a molybdenum deposition process to form a molybdenum-fill layer on the grain modification layer, wherein the grain modification layer comprises a metal different from molybdenum.

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Patent Owner(s)

Patent OwnerAddress
APPLIED MATERIALS INC3050 BOWERS AVENUE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
AILIHUMAER, Tuerxun Santa Clara, US 12 0
LEI, Wei Santa Clara, US 68 1081
LEI, Yu Belmont, US 136 1885
OH, Juhyun San Jose, US 2 28
PATEL, Sahil Sunnyvale, US 48 248
TANG, Xianmin San Jose, US 168 2484
WANG, Rongjun Dublin, US 129 1811
XU, Yi San Jose, US 319 2238
YANG, Yixiong Fremont, US 90 569
YUE, Shiyu Santa Clara, US 14 0

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