INTERCONNECT FABRIC LINK WIDTH REDUCTION TO REDUCE INSTANTANEOUS POWER CONSUMPTION
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United States of America Patent
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Issued Date -
Oct 24, 2024
app pub date -
May 7, 2024
filing date -
May 7, 2024
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Abstract
Described herein are various embodiments of reducing dynamic power consumption within a processor device. One embodiment provides a technique for dynamic link width adjustment based on throughput demand for client of an interconnect fabric. One embodiment provides for a parallel processor comprising an interconnect fabric including a dynamically configurable bus widths and frequencies.
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