TECHNIQUES TO MITIGATE MEMORY DIE MISALIGNMENT

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United States of America Patent

APP PUB NO 20240347083A1
SERIAL NO

18614244

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Abstract

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Methods, systems, and devices for mitigating memory die misalignment are described. A memory system may receive a command to write data to a memory device including a memory die. The memory system may determine whether the data indicated by the command (e.g., a first set of data) satisfies a threshold size. If the first set of data satisfies the threshold size, the memory system may determine whether data currently in a write buffer aligns with a boundary of the memory die. For example, depending on the data currently in the buffer, adding the first set of data to the buffer may result in die misalignment for the first set of data. To mitigate die misalignment, the memory system may pad data (e.g., add dummy data) to the write buffer, such that the padding aligns the data with the die boundary.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INCBOISE ID 83706-9698

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yang, Jie Shanghai, CN 566 3601
Zhang, Xu Shanghai, CN 514 2234
Zhao, Bin Shanghai, CN 405 7112

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