PARALLEL COMPUTATION ON INPUT VECTORS BY ORTHOGONAL REPRESENTATION
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United States of America Patent
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Issued Date -
Oct 10, 2024
app pub date -
Apr 6, 2023
filing date -
Apr 6, 2023
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Abstract
An array of resistive memory elements can be configured to store a plurality of values representing elements of a matrix. The array of resistive memory elements can be further configured to, responsive to an input vector being provided to the resistive memory elements, output a resulting vector representing a matrix multiplication of the matrix and the input vector, where the input vector includes a summation of a plurality of orthogonal vectors. A plurality of matched filters can be connected to outputs of the resistive memory elements, where each of the plurality of matched filters is configured to extract from the resulting vector a matrix multiplication result corresponding to a matrix multiplication of the matrix with one of the orthogonal vectors for which the respective matched filter is matched.
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