LOW POWER AND AREA CLOCK MONITORING CIRCUIT USING RING DELAY ARRANGEMENT
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United States of America Patent
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Issued Date -
Oct 10, 2024
app pub date -
Apr 4, 2023
filing date -
Apr 4, 2023
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Abstract
Circuitry and a method of operating a clock monitoring circuit for monitoring a clock signal is disclosed. The method comprises generating a train of pulses corresponding to a duration of respective phases of a clock signal, counting a number of pulses in respective generated pulse trains, determining (using the number of pulses) when durations of subsequent phases of the clock signal lengthen, determining (using the number of pulses) when durations of the subsequent phases of the clock signal shorten, and providing a clock abnormality detect (CAD) signal when the clock signal either lengthens or shortens. The number of pulses in each respective pulse train is indicative of the duration of the respective phases of the clock signal.
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