INTRA-PACKAGE MEMORY DIE COMMUNICATION STRUCTURES

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United States of America Patent

APP PUB NO 20240331757A1
SERIAL NO

18740242

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Abstract

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A packaged memory device can include a primary memory die coupled to a shared intra-package communication bus and coupled to an external host device using a host interface bus, and the host interface bus can include a host clock channel. The memory device can include multiple secondary dies coupled to the intra-package communication bus, and each of the secondary dies can be configured to receive the same messages from the primary memory die using the intra-package communication bus. The primary memory die can send a first message to, or receive a first message from, a particular one of the secondary dies using the intra-package communication bus, and the first message can include a first chip identification field that exclusively indicates the particular one of the secondary dies.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INCBOISE ID 83707-0006

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Giduturi, Hari Folsom, US 55 380

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