SEMICONDUCTOR MEMORY DEVICE
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United States of America Patent
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Issued Date -
Sep 26, 2024
app pub date -
Mar 6, 2024
filing date -
Mar 23, 2023
priority date (Note) -
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status (Latency Note)
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Abstract
According to one embodiment, in a semiconductor memory device including a first chip and a second chip. The first chip includes a first stacked body, a first semiconductor film, a second stacked body, a second semiconductor film, a contact plug and a first planar wiring line. The contact plug extends in the third direction between the first stacked body and the second stacked body. The first planar wiring line is disposed on a side opposite to the second chip with respect to the first stacked body, the contact plug, and the second stacked body, the first planar wiring line extending in the first direction and the second direction, covering at least the contact plug, and being connected to the contact plug.
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