THREE-DIMENSIONAL MEMORY DEVICE WITH BACKSIDE WORD LINE CONTACT VIA STRUCTURES AND METHODS OF FORMING THE SAME
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United States of America Patent
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Issued Date -
Sep 26, 2024
app pub date -
Sep 8, 2023
filing date -
Mar 22, 2023
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Abstract
A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, a memory opening fill structure located in the memory opening and including a vertical stack of memory elements and a vertical semiconductor channel, and a layer contact via structure vertically extending through a subset of the electrically conductive layers and a subset of the insulating layers that includes the bottommost insulating layer, and contacting a surface of a topmost electrically conductive layer within the subset of the electrically conductive layers.
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