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Abstract

A three-dimensional non-volatile memory device includes a plurality of horizontal word lines spaced apart from each other in a vertical direction, a pillar gate electrode buried in a first channel hole that passes through the horizontal word lines in the vertical direction, and a first dielectric layer disposed between the pillar gate electrode and the horizontal word lines in a cross section. The pillar gate electrode, the first dielectric layer, and the horizontal word lines correspond to memory cells including a plurality of variable capacitors spaced apart from each other in a vertical direction. The memory device further includes a selection transistor on the pillar gate electrode and the horizontal word lines and connected to one end of the pillar gate electrode, and a storage transistor under the pillar gate electrode and the horizontal word lines and connected to another end of the pillar gate electrode.

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First Claim