Asymmetric Device Size Stacking
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United States of America Patent
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Issued Date -
Sep 12, 2024
app pub date -
Feb 14, 2024
filing date -
Mar 6, 2023
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Abstract
A stack of transistors having equal voltage division when in the OFF state is disclosed. Rather than utilizing compensation capacitors, the present system varies the gate periphery of the transistors in the stack to achieve the desired voltage division. This may be done by varying the number of gate fingers in each transistor, by varying the gate width of the transistors or a combination of these approaches. This approach results in easier design, routing and simulation, with improved power handling.
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