High Speed Differential ROM
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United States of America Patent
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Issued Date -
Sep 12, 2024
app pub date -
May 17, 2024
filing date -
Feb 18, 2022
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Abstract
A semiconductor device includes a ROM, a differential sense amplifier and a multiplexer logic circuit. The ROM has memory cells in rows along word lines and columns along bit lines, and a reference column having reference transistors along a reference bit line. The multiplexer logic circuit couples a selected bit line to a first differential amplifier input and couples the reference bit line to the second differential amplifier input and controls a reference current of the reference bit line to be between a first bit line current of a programmed memory cell and a second bit line current of an unprogrammed memory cell.
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