DUAL GAIN COLUMN STRUCTURE FOR COLUMN POWER AREA EFFICIENCY
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United States of America Patent
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Issued Date -
Aug 22, 2024
app pub date -
Feb 17, 2023
filing date -
Feb 17, 2023
priority date (Note) -
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status (Latency Note)
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Abstract
A pixel cell readout circuit comprises a ramp generator having a ramp generator output. A first gain network is coupled to the ramp generator output and configured to provide a first variable comparator gain. A second gain network is coupled to the ramp generator output and configured to provide a second variable comparator gain. A first comparator has a first input coupled to the first gain network. The first comparator further has a second input selectively coupled to a first bitline and selectively coupled to a second bitline. A second comparator has a first input coupled to the second gain network. The second comparator further has a second input selectively coupled to the first bitline and selectively coupled to the second bitline.
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