Transistor Bias Adjustment for Optimization of Third Order Intercept Point in a Cascode Amplifier
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United States of America Patent
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Issued Date -
Aug 22, 2024
app pub date -
Jan 30, 2024
filing date -
Mar 6, 2019
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Abstract
Methods and devices for amplifying an input RF signal according to at least two gain-states is described. According to one aspect, a multi gain amplifier circuit including a low noise amplifier having a stack of transistors is used for amplification of the input RF signal. When switching from a low gain-state to a high gain-state, the drain-to-source voltage of the output transistor of the stack is increased to affect region of operation of the output transistor, and thereby reduce non-linearity at the output of the amplifier. When switching from the high gain-state to the low gain-state, the drain-to-source voltage of the input transistor of the stack is increased to affect region of operation of the input transistor, and thereby reduce non-linearity at the output of the amplifier.
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